1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor integrated circuit configured to enable transmission of high-speed signals with frequencies of GHz in a digital circuit.
2. Related Art
In recent years, finer patterning has further proceeded in the semiconductor integrated circuit using MOS circuit. For example, the process of 0.18 μm has achieved widespread use, the process of 0.13 μm is coming into practical use, and the process of 0.09 μm has begun to be introduced. Further, with the patterning made finer in the semiconductor integrated circuit, requested is high-speed operation using high-frequency clocks, and demanded is the reliability of switching operation in a band of several GHz.
Various attempts have been made to implement faster operation in the semiconductor integrated circuit. It is advantageous in increasing the operation speed to achieve further finer patterning to increase the degree of integration, and in addition thereto, attention is directed toward new techniques on materials of wiring and gate insulator, employment of FinFET and the like. However, difficulties often arise in thus changing the materials, structure, process and the like, and it is desired to obtain higher speed in the semiconductor circuit using the existing process and elemental techniques.
Generally, in a high-frequency region, the capacitance of a MOS transistor increases and becomes a factor of preventing high-speed operation. Particularly, it is a problem that an increase in capacitance of a depletion layer of a drain diffusion layer requires time for charge transfer in the state transition associated with switching operation. Further, another restriction on high-speed operation is the existence of RC delay in wiring to transmit input and output signals of a MOS transistor and wiring between the power supply and ground in the entire semiconductor integrated circuit.
Techniques have been proposed to enable high-speed operation in the state transition in the MOS transistor without changing the process and materials. For example, according to a circuit configuration as disclosed in JP 2002-124635, a varactor device is arranged adjacent to a MOS transistor, and fast switching of the MOS transistor is achieved by the varactor effect.
Meanwhile, to transmit high-speed signals, a differential circuit is known widely where differential signals which have mutually opposite phases are input and output. Generally, a differential circuit is comprised of two series circuits including PMOS and NMOS transistors, each of MOS transistors has the same structure, and control to pass a constant current only obtains a differential component. However, ideal operation is hard to implement because the delay arises in the transition of signal level in the switching operation as described above. Further, it is difficult to overcome such a problem by the techniques as disclosed in above-mentioned JP 2002-124635.